MIC58P42
PLCC Pin Configuration
Micrel
Absolute Maximum Ratings (Note 1, 2)
at 25 ° C Free-Air Temperature and V SS = 0V
Output Voltage
Output Voltage, V CE(SUS) (Note 1)
Logic Supply Voltage Range, V DD
V DD with Reference to V EE
Emitter Supply Voltage (Substrate), V EE
80V
50V
4.5V to 15V
25V
–20V
3
2
1
20
19
Input Voltage Range, V IN
–0.3V to V DD + 0.3V
NC
VSS
VDD
SERIAL DATA OUT
NC
4
5
6
7
8
MIC58P42BV
9 10 11 12 13
18
17
16
15
14
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
Package Power Dissipation, P D
MIC58P42BN
Derate above T A = +25 ° C
MIC58P42BV
Derate above T A = +25 ° C
MIC58P42BWM
Derate above T A = +25 ° C
Operating Temperature Range, T A
Storage Temperature Range, T S
1.82W
18mW/ ° C
1.4W
14mW/ ° C
1.2W
12mW/ ° C
–55 ° C to +125 ° C
–65 ° C to +150 ° C
Note 1: For Inductive load applications.
Note 2: CMOS devices have input-static protection but are susceptible to
damage when exposed to extremely high static electrical
charges.
Typical Input Circuits
Typical Output Driver
STROBE
OUTPUT
ENABLE
V DD
CLOCK
SERIAL
DATA IN
V DD
K
OUT N
V SS
V SS
3K
V EE
SUB
Pin Description
Pin
(DIP & S.O.)
Name
Description
1,9
V
EE
Substrate. Most Negative voltage in the system connects here.
2
3
CLOCK
SERIAL DATA IN
Serial Data Clock. A CLEAR input must also be clocked into the latches.
Serial Data Input pin.
4
5
V
V
SS
DD
Logic reference (Ground) pin.
Logic Positive Supply voltage.
6
7
8
10
11—18
SERIAL DATA OUT
STROBE
OUTPUT
ENABLE/RESET
K
OUTPUT N
Serial Data Output pin. (Flow–through).
Output Strobe pin. Loads output latches when high. Strobe is needed to clear latch.
When Low, Outputs are active. When High, device is reset from a fault condition.
Transient suppression diode's cathode common pin.
Open Collector outputs 8 through 1.
7-50
October 1998
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